Closed mingzhangqun closed 3 years ago
For EHRPWM0 and P8_13/P8_19 I verified using https://github.com/jadonk/BeagleBoard-DeviceTrees/blob/f3b99d626a0456afcb583739e5b2641cd88344c4/src/arm64/k3-j721e-beagleboneai64.dts#L925-L931.
cd /sys/class/pwm/pwmchip0
echo 0 | sudo tee export
cd pwm0
echo 1000000 | sudo tee period
echo 500000 | sudo tee duty_cycle
echo 1 | sudo tee enable
cd ..
echo 1 | sudo tee export
cd pwm1
echo 1000000 | sudo tee period
echo 500000 | sudo tee duty_cycle
echo 1 | sudo tee enable
I still need to spend some time with the P9 header and other channels. So far, I've verified all of P8 PRU and P8_13/P8_19 PWM.
I have submitted a PR for ehrpwm. https://github.com/beagleboard/BeagleBoard-DeviceTrees/pull/45
It's based on: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/982074/faq-tda4vm-dra829v-j721e-how-to-enable-ehrpwm-on-j7-evm-using-linux
Pins' conflicts: V23_EHRPWM3_A used by V23_DSI_GPIO1 W23_EHRPWM3_B used by W23_UART4_RXD W29_EHRPWM4_A used by W29_CSI0_GPIO1 W24_EHRPWM4_B used by W24_CSI1_GPIO2