Closed corrosion closed 10 years ago
In kernel v3.12, file sound/soc/davinci/davinci-mcasp.c, function mcasp_start_tx()
if((pdir & ACLKR) && (rclk_reg & ACLKRE)) { mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, RXCLKRST); } if((pdir & AHCLKR) && (rhclk_reg & AHCLKRE)) { mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, RXHCLKRST); }
Code is trying to set read-only bits in the DAVINCI_MCASP_GBLCTLX_REG register.
Issue is introduced from following commit: From e72407f930323a86d15cc4fd514b4f3b4acbcc8e Mon Sep 17 00:00:00 2001 From: Cody Lacey clacey@ti.com Date: Fri, 18 Oct 2013 12:42:00 -0500 Subject: [PATCH 14/15] ASoc: McASP: Lift Reset on CLK Dividers when RX/TX
Thanks, the fix has been pushed to branch 3.8 and 3.12.
In kernel v3.12, file sound/soc/davinci/davinci-mcasp.c, function mcasp_start_tx()
Code is trying to set read-only bits in the DAVINCI_MCASP_GBLCTLX_REG register.
Issue is introduced from following commit: From e72407f930323a86d15cc4fd514b4f3b4acbcc8e Mon Sep 17 00:00:00 2001 From: Cody Lacey clacey@ti.com Date: Fri, 18 Oct 2013 12:42:00 -0500 Subject: [PATCH 14/15] ASoc: McASP: Lift Reset on CLK Dividers when RX/TX