Open jadonk opened 5 years ago
@jadonk do you mean disabled by kernel driver?
@jadonk I think you mean setting the mux mode to have RX disabled in the device tree
Per the cape header pins sheet, I believe P1.02 / AIN6 / GPIO87
is:
and P2.35 / AIN5 / GPIO86
is:
Does that look right?
The pinmux for P1.2 and P2.35 should be set to RX disabled for the case where an analog input is provided on those pins floating between 0V and 3.3V. Otherwise, there is extra I/O cell leakage.
http://processors.wiki.ti.com/index.php/AM335x_Schematic_Checklist