Closed TellowKrinkle closed 3 years ago
This looks good to me :) What do you think @astrelsky
I see nothing wrong with the changes. My concern is why ghidra doesn't see it. There are special tables for RTsrc and RSsrc to export the constant 0 when they are zero correct? I was going to check earlier but forgot.
Doesn't really matter if ghidra's properly recognizing the zero reg for this, beq a0, a0
should always be true too (it's just not common enough to special case, the beq zero, zero
one is in Ghidra's generic mips processor definitions so I figured it was reasonable to add here)
The real issue is that Ghidra's pcode handling is missing a pass that converts if (true) x
to x
May you change the condition to rs == rt
? If so it would cover any situation however uncommon. It might be 1 =
sign.
I don't think its necessary. I have had the initial change locally and didn't know it. Never saw an issue.
I mean there's infinite ways to trip up current ghidra
li a0, 0
beq a0, zero
beq zero, zero x
is the one compilers seem to use, and the one that would get assembled if you wrote b x
in a mips assembler
Looking at the other special cases in ghidra mips, they also have bal
as bgezal zero
, which we could add, though I don't think any PS2 games are using PIC
Ghidra's decompiler can be dumb and not realize
if (true) goto x
can't fall through, breaking instruction reordering past the branchThis works around it by manually adding a separate
b
decoding forbeq zero, zero
Example file that decompiles stupidly
Example file decompiled with beq:
Example file decompiled with b: