bebbo / gcc

Bebbo's gcc-6-branch for m68k-amigaos
GNU General Public License v2.0
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Incorrect optimization(?) #212

Closed mheyer32 closed 9 months ago

mheyer32 commented 9 months ago

Consider this snippet of code: http://franke.ms/cex/z/567onr

You'll find that the WaitFifo(6); call was successfully fully inlined into

.L11:
        btst #2,(6889,a0)
        jne .L11

Which in itself is pretty amazing. But unfortunately, it made btst operate on a byte memory operand, while the device doesn't allow byte access to 16 bit registers. Apparently the 'volatile' keyword is not enough to convince the compiler that it can't change the word access to a byte access. I'm not a C language lawyer and don't know if this can be considered a compiler bug or not. If it is not, I'd like to ask for advice on how to get around this optimization. I love the fact that it inlined everything so well, so ideally I'd like to have my cake and eat it, too.... Please advise.

bebbo commented 9 months ago

this should work:

  volatile UWORD x;
  do {
       x = R_MMIO_W(GP_STAT);
  } while (!(x & (1 << testBit)));
mheyer32 commented 9 months ago

Thanks, that does the trick! I opted to create the temporary volatile variable in the readRegMMIOW() function, so I can't forget about it in other places. But now the compiler insists on reading the register into a stack variable instead of a register. I guess, I can live with that, though!

bebbo commented 9 months ago
static inline UWORD REGARGS readRegMMIOW(volatile UBYTE *mmiobase, UWORD reg)
{
    UWORD x = SWAPW(*(volatile UWORD *)(mmiobase + (reg - MMIOREGISTER_OFFSET)));
    asm volatile ("" :: "r"(x));
    return x;
}
mheyer32 commented 9 months ago

Perfect! Thanks a bunch!!