add first support for `clr.q` with 68080

[bebbo]

see https://github.com/bebbo/binutils-gdb/issues/38

see http://franke.ms/cex/z/8hcs6h

[bebbo]

@GunnarVB

For C code like this:

void clrstruct (int * ptr)
{
   ptr[10]=0;
   ptr[11]=0;
}

GCC will right now create this:

_clrstruct:
        clr.l (40,a0)
        clr.l (44,a0)
        rts

Could GCC be enhanced to use the CLR.Q opcode here for setting the two longs in one instruction?

Many thanks in advance!!

[bebbo]

added peephole to combine

        clr.l (40,a0)
        clr.l (44,a0)

into

        clr.q (40,a0)

added peephole for post increments too

[bebbo]

please test

[GunnarVB]

Excellent!! This works and compiled now!

Only I see one "clr.q a0" CLR on 68k generally not supports An Can this be done by GCC as SUBA ?

[bebbo]

there is no suba.q in the binutils asm.

[bebbo]

also note that .q is not the best extension, since gas would treat move.q as moveq

[GunnarVB]

Hello Bebbo,

About the 68K family.

There is a difference between Address registers and Data Registers and memory.

The Address registers have their own unit which (EA unit) which owns the register and which operates on them. The EA unit does always do a full An register update. This means "move.w #0,An" will not set the low word as a Move to DN would do but it will set the whole register to zero.

The 68080 CPU has a 32bit memory space. Addresses are always 32bit. Data register are 64bit and can be accessed: as byte, word, long, and 64bit.

And memory can be moved,read, written, cleared as Byte,Word,Long,Quad,16byte

So for clearing memory , or setting structures to zero this optimization of doing CLR.Q (mem) will be a real performance improvement. So thanks for enabling this.

I bit confused that the game i compile 1 time in total create an CLR.Q An Is this a mistake?

[GunnarVB]

Perfect this look good!

I have recompiled GCC and compiled with it to big programs .. Each 5 MB Exe. They both compiled now without Errors!

Thank you very much! This is great!