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ben-marshall / uart

A simple implementation of a UART modem in Verilog.
https://ben-marshall.github.io/uart/
MIT License
100 stars 21 forks source link

Update impl_top.v #1

Closed gansijuntuan closed 5 years ago

gansijuntuan commented 5 years ago

Tested the module using Xilinix board last week. I was connecting it to Microblaze through UartLite. It shows the last byte stack_data[63] is always sent twice while stack_data[0] will not be sent.

In the fix I expand 64 bytes array stack_data to 65 bytes and start storing data from stack_data[1]

ben-marshall commented 5 years ago

Hi there, thanks for this! Supprised I didn't see it sooner.