It looks like we could potentially use https://github.com/msyksphinz-self/riscv-isadoc to generate an xml file for the RISCV instruction set. Getting consistent document for the registers is a much smaller problem, although at a glance this looks promising. This is currently a lower priority to adding ARM support.
It looks like we could potentially use https://github.com/msyksphinz-self/riscv-isadoc to generate an xml file for the RISCV instruction set. Getting consistent document for the registers is a much smaller problem, although at a glance this looks promising. This is currently a lower priority to adding ARM support.