bergercookie / asm-lsp

Language server for NASM/GAS/GO Assembly
https://crates.io/crates/asm-lsp
BSD 2-Clause "Simplified" License
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Add support for Power ISA #147

Open NickCondron opened 1 week ago

NickCondron commented 1 week ago

This would be useful to me. I'm willing to work on it, but some direction would be appreciated.

The OpenPOWER specification is here https://openpowerfoundation.org/specifications/isa/

I found a JSON representation here https://github.com/open-power-sdk/PowerISA

WillLillis commented 1 week ago

This should be fine. Any sense of which pieces of information would be helpful for you to see (e.g. for hover documentation) from the JSON file? For example, from the branch instruction b:

{
                    "name": "Branch",
                    "form": "I",
                    "mnemonic": "b",
                    "operands": [
                        "target_addr"
                    ],
                    "conditions": [
                        {
                            "field": "AA",
                            "value": "0"
                        },
                        {
                            "field": "LK",
                            "value": "0"
                        }
                    ],
                    "layout": [
                        {
                            "name": "18",
                            "size": "6"
                        },
                        {
                            "name": "LI",
                            "size": "24"
                        },
                        {
                            "name": "AA",
                            "size": "1"
                        },
                        {
                            "name": "LK",
                            "size": "1"
                        }
                    ],
                    "release": "P1",
                    "intrinsics": []
                },
                ...
                "code": [
                "if AA then NIA :=<sub>iea</sub> EXTS(LI || 0b00)",
                "else       NIA :=<sub>iea</sub> CIA + EXTS(LI || 0b00)",
                "if LK then LR :=<sub>iea</sub> CIA + 4"
            ],
            "body": [
                "",
                "",
                "target_addr specifies the branch target address.",
                "",
                "If AA=0 then the branch target address is the sum of LI||0b00",
                "sign-extended and the address of this instruction, with the",
                "high-order 32 bits of the branch target address set to 0 in 32-bit",
                "mode.",
                "",
                "If AA=1 then the branch target address is the value LI||0b00",
                "sign-extended, with the high-order 32 bits of the branch target",
                "address set to 0 in 32-bit mode.",
                "",
                "If LK=1 then the effective address of the instruction following the",
                "Branch instruction is placed into the Link Register.",
                "",
                ""
            ]
        },

would the name, mnemonic, arguments, and code be helpful? I can include the body as well, but it does seem a bit verbose.

NickCondron commented 6 days ago

I would use this command to remove things I don't think are useful.

jq '.instructions | map({mnemonics: .mnemonics | map(del(.intrinsics)), body})' isa.json

The code field is useful, but it's latex which probably doesn't work for an lsp. The body field is useful, but unfortunately it's written per instruction - not per mnemonic. That makes it wordy and unhelpful because you'd have to reference the conditions field to decipher what each mnemonic means. The layout field is probably too much info for just a hover, but it could be useful to include elsewhere if that's possible. The release field corresponds to when the instruction was introduced within the family of Power ISAs which might be helpful.

P1 Instruction introduced in POWER Architecture. P2 Instruction introduced in POWER2 Architecture. PPC Instruction introduced in PowerPC Architecture prior to v2.00. v2.00 Instruction introduced in PowerPC Architecture Version 2.00. v2.01 Instruction introduced in PowerPC Architecture Version 2.01. v2.02 Instruction introduced in PowerPC Architecture Version 2.02. v2.03 Instruction introduced in Power ISA Version 2.03. v2.04 Instruction introduced in Power ISA Version 2.04. v2.05 Instruction introduced in Power ISA Version 2.05. v2.06 Instruction introduced in Power ISA Version 2.06. v2.07 Instruction introduced in Power ISA Version 2.07. v3.0 Instruction introduced in Power ISA Version 3.0. v3.0B Instruction introduced in Power ISA Version 3.0B. v3.0C Instruction introduced in Power ISA Version 3.0C. v3.1 Instruction introduced in Power ISA Version 3.1. v3.1B Instruction introduced in Power ISA Version 3.1B.

WillLillis commented 5 days ago

Any resources for the registers associated with this ISA? I found this wikipedia page describing the register set, but haven't been able to find anything yet with the actual names listed out.