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bespoke-silicon-group / accelerator-debugger

A framework for building application-level debuggers for bleeding-edge hardware systems.
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Add "golden RISCV" HW model #14

Open dpetrisko opened 5 years ago

dpetrisko commented 5 years ago

Could have very productive co-simulation benefits (BlackParrot in one window, golden model running in another). A couple ways to do this: 1) Translate spike output to a VCD https://github.com/riscv/riscv-isa-sim 2) Compile spike as a library and hook into it (Ariane does this to some degree, I believe) https://github.com/pulp-platform/ariane 3) Support reading in alternate formats such as log files (seems difficult and out of scope)

Could also look into RISCV-OVPSIM. Their goal is to be a compliance simulator, so there's a lot more rigor and flexibility than Spike, despite its relatively less popularity https://github.com/riscv/riscv-ovpsim

taylor-bsg commented 5 years ago

Aside:

In general, offline representations (e.g. traces) are more useful than runtime representations (I.e. linked simulators) but one place where they are not is when you need to synchronize them (I.e. when did the interrupt come in?) it would be interesting to know if Ariane did anything useful.

Aside2: if we had a concept of context switches in our comparison tool (I.e. this is an interrupt thread, this is an emulation thread) then offline comparisons could withstand some amount of deviation.

M

On Fri, Aug 2, 2019 at 9:06 AM Dan Petrisko notifications@github.com wrote:

Could have very productive co-simulation benefits (BlackParrot in one window, golden model running in another). A couple ways to do this:

  1. Translate spike output to a VCD https://github.com/riscv/riscv-isa-sim
  2. Compile spike as a library and hook into it (Ariane does this to some degree, I believe) https://github.com/pulp-platform/ariane
  3. Support reading in alternate formats such as log files (seems difficult and out of scope)

Could also look into RISCV-OVPSIM. Their goal is to be a compliance simulator, so there's a lot more rigor and flexibility than Spike, despite its relatively less popularity https://github.com/riscv/riscv-ovpsim

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