Ci gate level sim - Githubissues

bespoke-silicon-group / bsg_manycore

Tile based architecture designed for computing efficiency, scalability and generality

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Closed tommydcjung closed 3 years ago

tommydcjung commented 3 years ago

Adding skip_dram_instruction_load options to nbf generator to skip loading instruction to DRAM, if the binary fits in icache.