add formality checking =)

bespoke-silicon-group / bsg_sv2v

A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.

BSD 3-Clause "New" or "Revised" License

38 stars 10 forks source link

Open taylor-bsg opened 3 years ago

taylor-bsg commented 3 years ago

Seems like this would be a great (optional, add-on) feature to make sure that we are generating correct code.