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bespoke-silicon-group / bsg_sv2v

A tool that converts SystemVerilog to Verilog. Uses Design Compiler, so it is 100% compatible.
BSD 3-Clause "New" or "Revised" License
30 stars 10 forks source link

Delete comments #8

Closed stdavids closed 4 years ago

stdavids commented 4 years ago

https://github.com/bespoke-silicon-group/bsg_sv2v/blob/04743a473af47bc64a13f2d47f7dd090a0f8d840/scripts/py/bsg_elab_to_rtl.py#L87

stdavids commented 4 years ago

Fixed in PR #9