Closed AEW2015 closed 2 years ago
Xilinx has a feature to access the JTAG from within the FPGA HDL. https://www.xilinx.com/support/documentation/application_notes/xapp1283-internalprogramming-bbram-efuses.pdf
I have used their MicroBlaze and Driver to do this.
Driver SW: https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_services/xilskey/examples
Sorry, after review, it's only for UltraScale(+) devices...
Xilinx has a feature to access the JTAG from within the FPGA HDL. https://www.xilinx.com/support/documentation/application_notes/xapp1283-internalprogramming-bbram-efuses.pdf
I have used their MicroBlaze and Driver to do this.
Driver SW: https://github.com/Xilinx/embeddedsw/tree/master/lib/sw_services/xilskey/examples