I recently followed section 6.4 of this repository's README to run the TestApp project on an AWS F1 instance. I needed to make a couple of small changes to build the project with the version of Vivado that is included in the most recent version of AWS' "FPGA developer" cloud image.
Everything runs as expected until the DCP creation step, but when I run aws_build_dcp_from_cl.sh, Vivado fails with "Error generated from encrypted envelope" messages. This appears to be a compatibility issue with AWS' developer image, and the workaround is to comment out the last few lines in the project's encrypt.tcl script to prevent the design from being encrypted before synthesis.
After disabling the source file encryption, I got errors claiming that the CLK_b_CLK and RST_N_b_RST_N signals were either unconnected or unused. Commenting out these lines in the design's source seemed to fix that error and allow the synthesis to complete successfully.
I'm not sure how you think these issues should be addressed, or if I may have misread the README somewhere, but I figured I should report this in case anyone else runs into similar problems. Thank you.
Hello,
I recently followed section 6.4 of this repository's README to run the TestApp project on an AWS F1 instance. I needed to make a couple of small changes to build the project with the version of Vivado that is included in the most recent version of AWS' "FPGA developer" cloud image.
Everything runs as expected until the DCP creation step, but when I run
aws_build_dcp_from_cl.sh
, Vivado fails with "Error generated from encrypted envelope" messages. This appears to be a compatibility issue with AWS' developer image, and the workaround is to comment out the last few lines in the project'sencrypt.tcl
script to prevent the design from being encrypted before synthesis.After disabling the source file encryption, I got errors claiming that the
CLK_b_CLK
andRST_N_b_RST_N
signals were either unconnected or unused. Commenting out these lines in the design's source seemed to fix that error and allow the synthesis to complete successfully.I'm not sure how you think these issues should be addressed, or if I may have misread the README somewhere, but I figured I should report this in case anyone else runs into similar problems. Thank you.