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bluespec / Flute

RISC-V CPU, simple 5-stage in-order pipeline, for low-end applications needing MMUs and some performance
Apache License 2.0
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Adjust RISC-V extension naming convension #32

Closed zeeshanrafique23 closed 3 years ago

zeeshanrafique23 commented 3 years ago

According to Volume I: RISC-V Unprivileged ISA V20191213

Table 27.1: Standard ISA extension names. The table also defines the canonical order in which
extension names must appear in the name string, with top-to-bottom in table indicating first-to-last
in the name string, e.g., RV32IMACV is legal, whereas RV32IMAVC is not.

So, I modified the README accordingly.