bluespec / Piccolo

RISC-V CPU, simple 3-stage pipeline, for low-end applications (e.g., embedded, IoT)
Apache License 2.0
311 stars 49 forks source link

CPU modification for custom opcodes #32

Open nirajnsharma opened 4 years ago

nirajnsharma commented 4 years ago

Dispatch an instruction with a custom opcode to a TCA, and collect the response.