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bluespec / Toooba

RISC-V Core; superscalar, out-of-order, multi-core capable; based on RISCY-OOO from MIT
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Typo: mem-controller was being mapped to near-mem-io. #9

Closed nirajnsharma closed 4 years ago

nirajnsharma commented 4 years ago

Regenerated Verilog_RTL and src_SSITH_P3/Verilog_RTL