timblechmann
commented
4 years ago hmm, this is a good point. it's a little unfortunate that cmpxchg16b does not exist on early AMD processors. though it seems that even the win10 minimum requirements state that it requires this instruction.
though i'm wondering if the 57-bit virtual address space is enabled by simply running on those CPUs, or if it will require OS support to enable
According to the boost::lockfree documentation and from what I can see from boost/lockfree/detail/tagged_ptr_ptrcompression.hpp, the implementation of the free-list stores a 16-bit tag value in the upper bits of a 64-bit pointer.
Most recent Intel x86_48 microarchs (Ice Lake) use 5-level page tables and 57-bit virtual addresses, meaning this technique of pointer tagging can fail unexpectedly when used on such a processor.