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bperez77 / xilinx_axidma

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.
MIT License
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DMA transmit transaction hangs #107

Open formidable01 opened 5 years ago

formidable01 commented 5 years ago

We are experiencing an odd behavior that we are having trouble debugging. We are doing one way transfers on the transmit and receive side. The transmit side has wait = false and the receive has wait = true. After running for a while the transmit side hangs (the one way transfer call does not return). We can then look at the DMA register space and all the flags indicate that the transfer completed but the receive side times out having not received any data.

We are having difficulty isolating the issue but it appears to be some sort of lockup perhaps owing to a race condition maybe in the driver code itself. If you have any ideas of where to look or what to monitor that would be extremely helpful.

xiayanqian commented 2 years ago

Hello, I think we share the same problem, have you sovled it?

shyley commented 9 months ago

hello,Maybe I Meet the same problem,h ave you solved it?