A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.
Hi, I have a general question about how your DMA device driver works. In your source code, I did not see anywhere you put device address information of fpga inside the transfer function. So how were you managed to transfer data from PS to PL without the destination address?
Follow up question: If I want to use your device driver for my accelerator implemented using verilog on FPGA, how do I transfer data from user space to fpga space?
Hi, I have a general question about how your DMA device driver works. In your source code, I did not see anywhere you put device address information of fpga inside the transfer function. So how were you managed to transfer data from PS to PL without the destination address?