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bperez77 / xilinx_axidma

A zero-copy Linux driver and a userspace interface library for Xilinx's AXI DMA and VDMA IP blocks. These serve as bridges for communication between the processing system and FPGA programmable logic fabric, through one of the DMA ports on the Zynq processing system. Distributed under the MIT License.
MIT License
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The speed of reading DMA buf's data is too slow #133

Open stone-sjj opened 3 years ago

stone-sjj commented 3 years ago

I find that when DMA rx data end, and I use send(fd, recv_buf, len, 0) to send data to net, the speed is too slow，why?

My platform is zynq-7000 and the interface is HP, do anyone konw how to solve the problem? Thanks!

stone-sjj commented 3 years ago

Now I guess this phenomenon is relevant to cache of DMA, but I don't konw how to solve it .

ccasas777 commented 1 year ago

I have the same issue with zynq-7000. Do you know how to solve it? It seems to be relevant to a cache issue as you said What I did:

  1. add dma-coherent: it led to some errors in the data.
  2. try to use a zero-copy method moving dam buffer data directly used by the socket: I failed. However, even the idea succeed. The problem is still not solved, because Eventually, I need the data process in the user space before sending data out.