Add support for architecture-specific hash instructions to improve performance. For example, x86's SSE/AVX SHA instructions (sha256rnds2, sha256msg1, vsha512rnds2, etc). These will only be used if the target architecture supports the instructions, otherwise the existing software implementation will be used as a fallback.
Add support for architecture-specific hash instructions to improve performance. For example, x86's SSE/AVX SHA instructions (sha256rnds2, sha256msg1, vsha512rnds2, etc). These will only be used if the target architecture supports the instructions, otherwise the existing software implementation will be used as a fallback.