nbingham1
commented
2 months ago Ah, so ITAR and EAR prevent me from doing anything for technology nodes at 10nm or below. But it would be possible to set up gf180mcu (depending on its DRC rules). The format of the DRC rules for Floret are nearly identical to the format of the DRC rules for kLayout. At the moment, I am focused on other tooling and circuit design. However, if all goes well, I intend to come back to Floret in a few months.
Unfortunately, Floret doesn't support grid rules yet (and many other types of rules). However, you should be able to put a tech file together fairly quickly that generates circuits that pass most DRC checks. Use these kLayout DRC decks for reference. https://github.com/google/globalfoundries-pdk-libs-gf180mcu_fd_pr/tree/9f992d5a9186d1f7820c58f039c484ad35b2edea/rules/klayout/drc/rule_decks
Hello, your tool is very useful. Could you please provide more configurations of advanced processes, such as ASAP7 and gf180mcu? Furthermore, how can I obtain the area of the generated cell? Thank you.