Closed Ibnalene closed 5 months ago
Hi,
Even though there are some files present in this repository, FPGA support isn't 100% available yet in this public release. Given recent interest, we will fix the FPGA support in the following days.
Sorry for the inconvenience.
Hi,
Once again, sorry for the delay. I have updated the repositories to a more recent version including fixed FPGA support. Could you please try your setup again? The changes in 1de7bc9 should've fixed the issues you described.
Thanks!
Hi,
Are there any news regarding this? Can the issue be closed?
Thanks!
Yes, the error was resolved. Thank you.
Hi, I'm working on running Sargantana on ZU+ FPGA using vivado. After I load all the necessary files as indicated in the project_options.tcl file, I am getting the following error when trying to generate the RTL analysis:
[Synth 8-1033] hpdcache_mem_req_t is not declared under prefix drac_pkg ["[..]/core_tile/fpga/common/rtl/axi_arbiter.sv":42]
All the "drac_pkg::hpdcache_mem_id_t", "drac_pkg::hpdcache_mem_req_t" and "drac_pkg::hpdcache_mem_resp_r_t" give the same error.
When looking at the drac_pkg file, I don't see any of those variables declared there either. Any idea on how to fix this or what may be the issue?
Thank you