bsnes-emu / bsnes

bsnes is a Super Nintendo (SNES) emulator focused on performance, features, and ease of use.
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SA-1 DMA won't transfer to bank 0x41 #309

Open Fernap opened 5 months ago

Fernap commented 5 months ago

Any attempts to use SA-1 side DMA to BWRAM with a destination in bank 0x41 will result in a transfer to the corresponding address at bank 0x40 instead. Changing line 6 in bsnes/sfc/coprocessor/sa1/dma.cpp from a uint16 to a uint24 should fix the problem (the SNES dev manual indicates 18 bits are actually used). This bug was apparently introduced here.

Credit to @VitorVilela7 and @TheLX5 for originally diagnosing the problem, and Vitor for tracking down when the regression was introduced.

orbea commented 5 months ago

Do you happen to have a test case?

Fernap commented 5 months ago

Ultimately, finding this came from some custom code for handling dynamic sprites used in Vitor's SA-1 enhancement patch for SMW. You can see an example of the code used here, among a few other spots; !DSX_BUFFER is a define set to $418000. However, the actual DMA transfers to $408000 instead.

Is that sufficient, or were you looking more for a test ROM of some sort?

carmiker commented 5 months ago

A test ROM would always be helpful. The only reference I see to anything 18-bit in the manual is related to the Timer Circuit, in Book 2, Page 1-2-2. On the other hand I do see that DDA is a 24-bit register on Page 1-4-22. So I believe using a uint24 here is indeed correct.

Fernap commented 5 months ago

Sorry, the 18 bit size I was getting was from table 1-9-2 on page 1-9-3. Presumably it says 18 bits because that's the maximum possible size of BW-RAM, even if DDA is 24 bits.

VitorVilela7 commented 5 months ago

SA-1 DMA should work for banks $40-$43, it's documented on SA-1 dev book. I recommend changing the register to 24-bit.

I don't have a test ROM available right now but I can test this in the nearby future.

Vitor

Em dom., 14 de jan. de 2024, 00:36, Fernap @.***> escreveu:

Sorry, the 18 bit size I was getting was from table 1-9-2 on page 1-9-3. Presumably it says 18 bits because that's the maximum possible size of BW-RAM, even if DDA is 24 bits.

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