bu-icsg / dana

Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
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logic error #24

Closed zaddan closed 8 years ago

zaddan commented 8 years ago

I get the following error while trying to ./build.sh:

Configuring project riscv-isa-sim Building project riscv-isa-sim ../riscv/extension.cc: In member function ‘void extension_t::raise_interrupt()’: ../riscv/extension.cc:23:9: error: ‘logic_error’ is not a member of ‘std’ gmake: * [extension.o] Error 1 gmake: * Waiting for unfinished jobs.... ../riscv/interactive.cc: In member function ‘reg_t sim_t::get_reg(const std::vectorstd::basic_string&)’: ../riscv/interactive.cc:181:12: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] ../riscv/interactive.cc:192:12: warning: comparison between signed and unsigned integer expressions [-Wsign-compare] ../spike_main/disasm.cc: In constructor ‘disassembler_t::disassembler_t()’: ../spike_main/disasm.cc:253:1: note: variable tracking size limit exceeded with -fvar-tracking-assignments, retrying without

seldridge commented 8 years ago

Technically this is an issue with riscv-isa-sim or, more generally, riscv-tools. Can you verify that you've cleared the dependencies needed for riscv-tools and that you have GCC > 4.8 (i.e., that you've taken care of everything here: https://github.com/riscv/riscv-tools#quickstart)?

seldridge commented 8 years ago

I think this issue is superseded by #25.