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Dynamically Allocated Neural Network Accelerator for the RISC-V Rocket Microprocessor in Chisel
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Issue 17 utl interface
#34
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seldridge
closed
8 years ago
seldridge
commented
8 years ago
Add support for L2 Reads using the ANTW. Partial for #17.
Add support for L2 Reads using the ANTW. Partial for #17.