<pll_ddr> not found while processing module instance <pll_static_clocks>

[LurenAA]

I encountered the following error while simulating with Vivado, it seems that some files are missing.

Vivado Simulator v2022.1 Copyright 1986-1999, 2001-2022 Xilinx, Inc. All Rights Reserved. Running: /tools/Xilinx/Vivado/2022.1/bin/unwrapped/lnx64.o/xelab --incr --debug typical --relax --mt 8 -L xil_defaultlib -L uvm -L unisims_ver -L unimacro_ver -L secureip --snapshot test_ddr3_memory_controller_behav xil_defaultlib.test_ddr3_memory_controller xil_defaultlib.glbl -log elaborate.log Using 8 slave threads. Starting static elaboration Pass Through NonSizing Optimizer ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/txt/xgb/kyzx/DDR/ddr3_memory_controller.v:609] ERROR: [VRFC 10-2063] Module not found while processing module instance [/home/txt/xgb/kyzx/DDR/ddr3_memory_controller.v:667] ERROR: [XSIM 43-3322] Static elaboration of top level Verilog design unit(s) in library work failed.

[abdullaibaksoliton]

ERROR: [VRFC 10-2063] Module not found while processing module instance [C:/Users/abdulla.ibak/SV/DDR3_RAM/DDR3_RAM.srcs/sim_1/new/test_ddr3_memory_controller.v:816] ERROR: [VRFC 10-2063] Module not found while processing module instance [C:/Users/abdulla.ibak/SV/DDR3_RAM/DDR3_RAM.srcs/sim_1/new/test_ddr3_memory_controller.v:838] ERROR: [VRFC 10-2063] Module not found while processing module instance [C:/Users/abdulla.ibak/SV/DDR3_RAM/DDR3_RAM.srcs/sim_1/new/test_ddr3_memory_controller.v:853] You didn't face these errors?