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bytecodealliance / wasmtime

A fast and secure runtime for WebAssembly
https://wasmtime.dev/
Apache License 2.0
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riscv64: Add support for `load+extend` patterns #8765

Closed afonso360 closed 3 weeks ago

afonso360 commented 3 weeks ago

👋 Hey,

This PR adds support for merging {s,u}extend instructions into a preceding load.

RISC-V doesn't have sinkable loads per se, but the regular load instructions sign / zero extend the loaded values by default. So here we model that by pretending that that is a sinkable load on an extend instruction.

This PR is also a part of #6056. I'm working on that, the first step is to support generating the same code with load+extend on all backends as we currently do with the specialized {u,s}loadNN instructions.

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