Note: This PR should not be accepted until Tincr PR 89 is accepted.
This PR addresses issue #364, where Vivado cannot place LUT RAM macros in a design after the LUT RAM macros have been flattened by RapidSmith2. This PR creates RPMs for the LUT RAM macros using additional functionality added to Tincr. With these RPMs in place, Vivado creates the correct implicit placer shapes when reading the netlist and can place the LUT RAMs. Note that if the user unplaces a design in Vivado, this will also unplace the BEL constraints that are added as part of the RPM and the LUT RAMs will again be unplace-able. I have found no way around this.
Note: This PR should not be accepted until Tincr PR 89 is accepted.
This PR addresses issue #364, where Vivado cannot place LUT RAM macros in a design after the LUT RAM macros have been flattened by RapidSmith2. This PR creates RPMs for the LUT RAM macros using additional functionality added to Tincr. With these RPMs in place, Vivado creates the correct implicit placer shapes when reading the netlist and can place the LUT RAMs. Note that if the user unplaces a design in Vivado, this will also unplace the BEL constraints that are added as part of the RPM and the LUT RAMs will again be unplace-able. I have found no way around this.
Suggestions/improvements are very much welcome.