This PR mainly contains methods that are helpful for an inter-site router. However, there are also a few fixes.
Highlights:
Psuedo Cells: A bool has been added to the Cell class to mark a cell as being "pseudo". The idea is similar to pseudo cell pins. One situation where this is needed is when a LUT6 BEL and the corresponding LUT5BEL are both being used as a routethrough or static source. In this case, the A6 pin needs VCC routed to it, but there is no real cell to place the pseudo pins on. A pseudo cell can instead be created and used.
Pseudo VCC pin detection: Pseudo pins that need to be created for physical VCC routing can be optionally found upon RSCP import.
CellNet Aliases: Hierarchical designs contain aliases for nets; a net can have different names in different levels of hierarchy. RS2 does not support hierarchical designs, but does have PR support. Aliases can also arise in PR designs.
GlobalCLK, LocalCLK: Some methods to detect local vs global clock nets, which are routed differently.
Fixed incorrect RouteStatus for GND nets: The CYINIT/CIN pins caused the GND net route status to be computed incorrectly. This PR fixes this.
Fixed getWiresInNode for SiteWires: This method used to incorrectly just return the wire.
Sorting Class with quick sort: Can be used for sorting route trees in a router
This PR mainly contains methods that are helpful for an inter-site router. However, there are also a few fixes.
Highlights: