ClockCrank

[reillymck]

• Add clock rates to designs in design.yaml (clock rate and waveform supported. One clock signal only)
• Add ClockCrank (find fastest clock rates)
• Make synth_design and impl_design commands more modular
• Allow for VivadoSynth and VivadoImpl mustache dicts to be edited by the flows
• Depreciate VivadoSynthFromTcl
• Make tcl scripts modular/more reusable
• Add opentitan external tool and compilation flow
• Make it possible for dummy design objects
• Allow parts to be specified in design.yaml
• Fix jpegencode design, partial dsp integration
• Utility scripts for batch updating clock rates in design yamls and creating spreadsheets of flow results

[reillymck]

Would close #387

[reillymck]

@jgoeders Can you possibly help me understand why VivadoBitAnalysis is failing?

[jgoeders]

@reillymck Sure, I'll take a look.

[jgoeders]

@reillymck I think I fixed it.