cadpnq / risk-vee

A small, microcoded RISC-V processor.
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About register file(GPRs) footprint #1

Open rgwan opened 6 years ago

rgwan commented 6 years ago

I'm curious about that if we going to realize it by discrete CMOS logic or 74 series IC. How us to realize 31x32bits global register file without large footprint? As we already know, Decoder + DFF requires a large footprint and it can hardly put on one board.

I'm sorry for my poor English, and it isn't an issue (lol). But I hope to realize it by discrete CMOS logic or 74 series logic chip. Thank you for reading this question.

cadpnq commented 6 years ago

When in doubt: cheat. What I had in mind was to use SRAM. Whatever I could scavenge that was fast enough and I had enough of to reach 32bits wide. You could cram them (and whatever glue logic you need) onto one fairly small board. Otherwise, like you said, you'd need quite a few chips and most likely multiple boards. Every other section of the design will be pretty large so cheat where you can. My target is/was the 74 series. If you dig into the project I'd love to see your progress!