@jiahanxie353 has proposed adding floating-point constants to the CIRCT frontend in https://github.com/llvm/circt/pull/7086. I think this is particularly interesting because we'd have to figure out how to represent these constants in Calyx. Verilog itself (AFAIK) does not support IEEE-754 constants and so we'd have to generate the right bit-patterns.
One possible approach is adding this capability to calyx-frontend but the IR only ever sees bit-patterns for the numbers. In this case from_ast becomes responsible for transforming a floating-point constant string into the correct bit-pattern.
@jiahanxie353 has proposed adding floating-point constants to the CIRCT frontend in https://github.com/llvm/circt/pull/7086. I think this is particularly interesting because we'd have to figure out how to represent these constants in Calyx. Verilog itself (AFAIK) does not support IEEE-754 constants and so we'd have to generate the right bit-patterns.
One possible approach is adding this capability to
calyx-frontend
but the IR only ever sees bit-patterns for the numbers. In this casefrom_ast
becomes responsible for transforming a floating-point constant string into the correct bit-pattern.