Support for Intel MAX10 FPGAs

[gardners]

Hello again, your favourite issue submitter here ;)

We were wondering how feasible it would be to add support for pushing bitstreams to Intel MAX10 FPGAs to fpgajtag? (Basically Quartus the official tool is a bit of a tool, in that it doesn't support all JTAG adapters, which rather inconveniences us).

Thanks, Paul.

[jameyhicks]

Hi Paul,

Typically we need access to a board and the "production" programming tool in order to provide support for it. Also, I'll look at the Intel documentation to see if there is any help there.

Jamey

[jankcorn]

Paul, I was looking at the bemicro max10 dev boards, but have a few questions: 1) are you planning to use the 10 pin JTAG connector (Intel s/w normally uses usb blaster on this connector)? 2) Is the USB->JTAG adapter you want to use the same one you used on Xilinx?

Looking through the bemicro docs a bit, I am pretty sure the only difference would be how the board is reset before using JTAG. (for device chain identification to work correctly, we need to start from a reset state -- I can't use the IDCODE command to identify the parts/chain unless I know number of elements/bit width)

I am guessing it 'might' go fine and am willing to try tracking down problems if you can gather data.

Locally, I just have an old Cyclone V board. I don't know if testing with that would be helpful for the Max10 support or not.

If you can point me to a cheap (<$200) eval board that more or less matches your config, I am certainly willing to buy/test.

Interested?

On 1/2/21, Jamey Hicks notifications@github.com wrote:

Hi Paul,

Typically we need access to a board and the "production" programming tool in order to provide support for it. Also, I'll look at the Intel documentation to see if there is any help there.

Jamey

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[gardners]

Thanks for your willingness to investigate this! Yes, the IDCODE field seems to be a different width as the primary sticking point.

1) The Arrow programmer we are trying to avoid using is this one:

https://shop.trenz-electronic.de/en/TEI0004-02-ARROW-USB-Programmer2-for-development-with-Intel-FPGAs-2.54-mm-header

There is a connector on the MEGA65 main board that accepts this. It is indeed 10 pin.

2) Yes, we want to be able to use a TE0790-03 to configure a MAX10 FPGA. Bonus points if we can figure out how to get it to write to the flash on the MAX10, so that we can update the stored bitstream. I think this can be done with a bitstream, so if we can get the one-time-configuration via JTAG, then we can do that multiple times with a bitstream that uses pre-configured BRAM to flash part of the flash each time. Mildly tedious, but doable. Or we make a bitstream that allows streaming the flash data, like vivado etc to do flash parts. Also doable.

(Basically we have 100 MEAG65 DevKit users out there who need a way to upgrade the MAX10 bitstream, preferably without needing to buy Yet Another JTAG Adapter)

I'm happy to try things on hardware here for you, while we figure out the best hardware for you to get. But I am also looking on Trenz's website to see if I can find a MAX10-using board that has the same 10 pin connector. Annoyingly, they are out of the TE0790s, or I would order you one of those straight away. But in theory if you have any JTAG programmer that fpgajtag could be used, given what we are trying to do, right?

Otherwise, we do have a couple of devkits in the UK. Where abouts are you based? Is Cambridge Hackers still geographically informative and accurate?

[jankcorn]

Paul,

Just to confirm: 1) you do not want to use the 'ARROW-USB' programmer (Trenz' Quartus compatible device) 2) you do want to use the TE0790-03 (Trenz' Xilinx compatible device). I assume the TW0790-03L is not acceptable (since it is not Xilinx compatible): https://shop.trenz-electronic.de/en/search?sSearch=te0790 3) Availability of the TE0790-03 seems to be no problem w/Digikey: https://www.digikey.com/en/products/detail/trenz-electronic-gmbh/TE0790-03/10071026?utm_adgroup=Programmers%2C%20Emulators%2C%20and%20Debuggers&utm_source=google&utm_medium=cpc&utm_campaign=Shopping_Product_Development%20Boards%2C%20Kits%2C%20Programmers_NEW&utm_term=&utm_content=Programmers%2C%20Emulators%2C%20and%20Debuggers&gclid=Cj0KCQiA88X_BRDUARIsACVMYD9jDs1eCZ3DUO70AX7uQ41xSWmv0_bKYpn-u3IXn5h56JZH83tRCkEaAhq9EALw_wcB 4) If you can figure out a simple MAX10 dev board for me to try, I can easily order the programmer and dev board from digikey. (looks cheap) 5) As for physical location: I (John/jca) am in Palo Alto, CA/USA; Jamey is in Cambridge, MA/USA. 6) I haven't looked into it yet, but I think that the only tricky parts will be: a) Quartus output bitfile format (xilinx has a header that must be skipped; I assume Intel also has something). I will look for info on this today. b) How to handle the 'hardware reset' line. On the 10-pin connector on your board, do you have reset connected to any of the pins? Is 'same as existing xilinx' usage ok for you?

Looking forward to getting this to work! jca

On 1/3/21, gardners notifications@github.com wrote:

Thanks for your willingness to investigate this! Yes, the IDCODE field seems to be a different width as the primary sticking point.

1) The Arrow programmer we are trying to avoid using is this one:

https://shop.trenz-electronic.de/en/TEI0004-02-ARROW-USB-Programmer2-for-development-with-Intel-FPGAs-2.54-mm-header

There is a connector on the MEGA65 main board that accepts this. It is indeed 10 pin.

2) Yes, we want to be able to use a TE0790-03 to configure a MAX10 FPGA. Bonus points if we can figure out how to get it to write to the flash on the MAX10, so that we can update the stored bitstream. I think this can be done with a bitstream, so if we can get the one-time-configuration via JTAG, then we can do that multiple times with a bitstream that uses pre-configured BRAM to flash part of the flash each time. Mildly tedious, but doable. Or we make a bitstream that allows streaming the flash data, like vivado etc to do flash parts. Also doable.

(Basically we have 100 MEAG65 DevKit users out there who need a way to upgrade the MAX10 bitstream, preferably without needing to buy Yet Another JTAG Adapter)

I'm happy to try things on hardware here for you, while we figure out the best hardware for you to get. But I am also looking on Trenz's website to see if I can find a MAX10-using board that has the same 10 pin connector. Annoyingly, they are out of the TE0790s, or I would order you one of those straight away. But in theory if you have any JTAG programmer that fpgajtag could be used, given what we are trying to do, right?

Otherwise, we do have a couple of devkits in the UK. Where abouts are you based? Is Cambridge Hackers still geographically informative and accurate?

-- You are receiving this because you commented. Reply to this email directly or view it on GitHub: https://github.com/cambridgehackers/fpgajtag/issues/6#issuecomment-753599814

[jankcorn]

Looking into bitfile file format, it seems that the 'rbf' file format is what we will eventually use (uncompressed, raw bit file, not the 'rpd' format). To interpret the file, I think that the 'jam' file format will also be useful, since it displays the programming operation in a human readable format (for the hideous, open source, jam player). https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf and https://stackoverflow.com/questions/59556995/what-kind-of-file-for-passive-parallel-loading-of-cyclone-10-fpga

I am not entire sure how to program the flash memory, but it seems that there are 'In-System Programming' instructions (intel pdf section 2.1.2.3) for doing this.

If we are lucky, this might go quickly. If not, could be a bit of a long slog. ;-) jca

[gardners]

1. Correct.
2. Correct.
3. Ah, that's nice that Digikey have stock. Trenz themselves don't. I actually need to order one for one of our team, so that gives me a solution to that, as well.
4. This is a good question. I don't know which boards use it, apart from our board which is currently between runs. I'll ask Trenz what their cheapest board is that uses the TEI0004.
5. Ah, so Cambridge MA, not Cambridge UK :) Palo Alto might be doable, as I think we have a couple of guys with DevKits in the Bay area -- but I'm not certain. I'll make a quick enquiry. 6.a. Looks like you have that solved already. 6.b. I'd need to check. There must be some mechanism for this, as the TEI0004 can reset the MAX10. But I can't see a reset line connected. Just pure JTAG. I presume the reset instruction must therefore be issued via JTAG.

Yes, if we can push bitstreams, then I can work through the Intel in-system programming stuff. Let's hope it is easier rather than harder!

[gardners]

Unfortunately the MEGA65 that is normally in the Bay Area is currently back in Germany, so I can't get you access that way. However our contact at Trenz is back in a few days, so I will check in with them then.

[jankcorn]

I looked at the MEGA65 user guide at: https://files.mega65.org/news/MEGA65-User-Guide.pdf (is this the correct device?) And then at the schematics for TE0790-03: https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/JTAG_Programmer/TE0790/REV03/Documents/SCH-TE0790-03.PDF and the TEI0004-02: https://shop.trenz-electronic.de/trenzdownloads/Trenz_Electronic/JTAG_Programmer/TEI0004/REV02/Documents/TRM-TEI0004-02.pdf

If I am reading the schematics correctly, the JTAG connector pinout seems to be quite different (pin1 is GND on TE0790, but TCK on the TEI0004). Strangely, on the TE0790, the connector pins are labeled 'A', 'B'...'H'; the FTDI pins are labeled TCK/TDI/TDO/TMS, but I can't find a correspondence chart in their schematics.

Are you planning on building a 10pin <-> 10pin adapter?

It would be great if you could get a subset of the schematic for the MEGA65, just showing the JTAG connector <-> MAX10 connections. (but I don't know if they will let you have it!)

Sorry for all the questions!

On 1/4/21, gardners notifications@github.com wrote:

Unfortunately the MEGA65 that is normally in the Bay Area is currently back in Germany, so I can't get you access that way. However our contact at Trenz is back in a few days, so I will check in with them then.

-- You are receiving this because you commented. Reply to this email directly or view it on GitHub: https://github.com/cambridgehackers/fpgajtag/issues/6#issuecomment-754412282

[gardners]

Hello,

Yes, we plan to make an adapter board that will actually sit on both connectors, and accept a TE0790 and have some yet-to-be-decided mechanism for switching which JTAG bus will actually be connected.

Now, as for the schematics, we're an open-source project, so that's easy:

TE0765-03.pdf

[jankcorn]

This is a big relief, thanks. I think I will just root around for some simple generic max10 board and should be good to go.

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[gardners]

Super :)

[gardners]

Two bits of news from Trenz:

1. MAX1000

https://shop.trenz-electronic.de/de/TEI0001-03-08-C8-MAX1000-IoT-Maker-Board-8kLE-8-MByte-RAM

the FTDI interface is same as on mega65

2. https://github.com/marsohod4you/MBFTDI-SVF-Player

mbftdi can flash the MAX10, this has been tested out

[jankcorn]

Finally got boards and tried out various things. Looking at: https://zipcpu.com/blog/2017/12/16/max1k.html it appears that the best way to go is to generate SVF files from SOF/POF (depending on what you need) using the standard quartus utility. Something like: quartus_cpf -c -q 4.5MHz -g 3.3 -n p output_files/test0.pof test0.svf The SVF interchange format is ASCII and quite easy to read.

After wiring up a TE0790-030 to the relevant pins on on J4 on the Max-1000 board, I used the software from: http://www.clifford.at/libxsvf/ (my command was just: xsvftool-ft232h -s test0.svf )

It looks like the libxsvf s/w works right out of the box (interestingly, both the 'Arrow' programmer built into the Max-1000 board and the TE0790-03 have the same USB id: 0403:6010 !)

It looks like all you need is a wiring adaptor board and you can use the libxsvf s/w immediately. Ok?

[jankcorn]

since the max10 fpgas are small and it looks like there is a good existing workaround, I am going to close this out.