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cambridgehackers / fpgamake

Generates Makefiles to synthesize, place, and route verilog using Vivado
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Added hierarchical flag for report_utilization #19

Closed acw1251 closed 8 years ago

acw1251 commented 8 years ago

This produces *-util.txt files with hierarchical usage information. For our riscy processors, the new log files are only ~400 lines long, so its not a significant amount of extra logs.