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cambridgehackers
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fpgamake
Generates Makefiles to synthesize, place, and route verilog using Vivado
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Support Altera Quartus II IP file (.qip)
#2
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hanw
closed
9 years ago
hanw
commented
9 years ago
added support for .qip through --xci option.
added more verilog keyword in fpgamake to avoid parsing error.