x86: incorrect disassembly around FSTCW, FSTSW instructions

[minexew]

Env:

• python 3.8
• capstone 4.0.1
• ubuntu 18.04 (WSL)

Repro:

import capstone
md = capstone.Cs(capstone.CS_ARCH_X86, capstone.CS_MODE_32)
md.detail = True

# case 1
# expected: fstcw  WORD PTR [ebp-0x4] (based on Objdump disassembly which round-trips with GNU as)
for insn in md.disasm(b"\x9B\xD9\x7D\xFC", 0):
    print(insn.address, insn.mnemonic, insn.op_str)

print()

# case 2
# expected: fstsw  WORD PTR [ebp-0x2]
for insn in md.disasm(b"\x9B\xDD\x7D\xFE", 0):
    print(insn.address, insn.mnemonic, insn.op_str)

Output:

0 wait
1 fnstcw word ptr [ebp - 4]

0 wait
1 fnstsw dword ptr [ebp - 2]

[tzoz]

The operand size for case 2 is wrong indeed, but FSTCW is equivalent to FWAIT/WAIT followed by FNSTCW. The same applies to FSTSW.

[minexew]

Technically it is, but the Intel reference manual, GMU binutils and nasm-ndisasm all follow this convention. Why be different?

[tzoz]

Probably because it is less complicated to parse them as separate instructions while still being technically correct.