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capstone-engine / capstone

Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
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M68K: addressing mode 7, register 0/1 #1667

Open maximumspatium opened 4 years ago

maximumspatium commented 4 years ago

Capstone disassembly for the addressing mode 7, register 0 and 1 doesn't conform with the Motorola specification that uses parentheses around the destination address:

M68K addressing mode 7, reg 1

That's Capstone's output for two related instructions:

./cstool m68k40 "2A 79 5F FF EF F0"
movea.l $5fffeff0.l, a5

./cstool m68k40 "41 F8 00 01"
lea.l   $1.w, a0

Expected output according with the Motorola manual would be

movea.l ($5fffeff0).l, a5
lea.l   ($1).w, a0

respectively. In the case of the MOVEA, the original disassembly makes much more sense because that instruction actually loads a double word from the specified EA into A5. Omitting the parentheses would make the programmer think that the EA itself will be loaded into A5.

Question: should we make Capstone disassembly conform with the Motorola docs?

michalsc commented 3 years ago

Question: should we make Capstone disassembly conform with the Motorola docs?

I would not. The disassembly in form of (xxx).W or .L as suggested in Motorola docs was never used in reality. The m68k assemblers on amiga as well as gnu tools use the notation without parentheses.

huth commented 2 years ago

Same on the Atari assemblers/disassemblers - I've never seen the parentheses there. Thus I suggest to close this ticket unless somebody wants to implement it with an optional bit in the config settings.

maximumspatium commented 2 years ago

Let's close it for now.