capstone-engine / capstone

Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
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SystemZ Vector Load with alignment hint #2194

Open juergenchrist opened 8 months ago

juergenchrist commented 8 months ago

Hi,

when trying to disassemble a SystemZ Vector Load instruction that includes an alignment hint, capstone does not recognize this instruction:

$ cstool -d systemz 0xe70050003006
ERROR: invalid assembly code

Without the alignment hint, everything works fine:

$ stool -d systemz 0xe70050000006
 0  e7 00 50 00 00 06  vl   %v0, 0(%r5)
    ID: 1966 (vl)
    op_count: 2
        operands[0].type: REG = v0
        operands[1].type: MEM
            operands[1].mem.base: REG = 5
    Groups: vector 

I guess the third operand (4-bit immediate M3 with possible values 0 for no alignment, 3 for doubleword aligned, and 4 for quadword aligned) is currently not parsed/supported. Would it be possible to add this?

Thanks.

XVilka commented 6 months ago

The best way to update System Z deficiencies is to do the "auto-sync" with the mainstream LLVM like it was done for ARM, ARM64, PPC, Tricore, Alpha: https://github.com/capstone-engine/capstone/issues/2015 There is currently a lack of hands working on the project, and System Z, sadly, is not yet one of our (Rizin team) priorities. Thus, they could do such an update if people want to contribute. If there is a desire to proceed - we could describe the process in detail. There is some short documentation already: