AArch64 missing details tasks

capstone-engine / capstone

Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.

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AArch64 missing details tasks #2196

Open Rot127 opened 1 year ago

Rot127 commented 1 year ago

List to track not yet implemented or faulty details of AArch64

[x] Warning if arm64 is passed to cstool
[x] SME vector lead/store/read/write have incorrect outs/ins set
[x] za writes are not listed in register write list
[ ] U/SBFM alias modulo change depending on S and N bit. (wait for encoding info).
[x] Memory operands/index regs labeled incorrectly (https://github.com/capstone-engine/capstone/issues/2285)

FinnWilkinson commented 1 year ago

Hi @Rot127, I'm not sure what the timeline is on these issues, but another which I have just spotted in next branch since the AArch64 auto-sync PR merge is that arch/AArch64/AArch64GenRegisterName.inc needs updating as was done with the rest of the AArch64 .inc files.

Given the use of LLVM 16.x for the generation of these files, SME2 & SVE2 is now included which introduced a new zt0 register. This is present in the AArch64GenRegisterInfo.inc file, but not the file mentioned above.

Rot127 commented 1 year ago

AArch64GenRegisterName.inc Shouldn't be there anymore actually. It is no longer used and I just forgot to delete it.

I'm not sure what the timeline is on these issues,

Timeline is a little hot topic. I have to work on other stuff most the time so it will take a little until all the left issues will be done. Going to finish these ones here first though.