capstone-engine / capstone

Capstone disassembly/disassembler framework for ARM, ARM64 (ARMv8), Alpha, BPF, Ethereum VM, HPPA, LoongArch, M68K, M680X, Mips, MOS65XX, PPC, RISC-V(rv32G/rv64G), SH, Sparc, SystemZ, TMS320C64X, TriCore, Webassembly, XCore and X86.
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MIPS Missing Instructions for R3000A #754

Closed Jaguar83 closed 2 years ago

Jaguar83 commented 7 years ago

After doing a simple test with some invalid instructions found in a program I'm reverse engineering, I've found some instructions that binutils recognises that capstone doesn't. I'm working on a Playstation 1 binary, so they may be exclusive to the PSX. I've provided the assembler file I used to test, commented with the output of objdump's -d.

testasm.txt

kevinhartman commented 4 years ago

@Jaguar83 I can confirm these are missing (I know your original post was years ago :) ). They're defined in the MIPS I ISA and should be added to Capstone. According to your testasm.txt, PS1 must have some custom hardware mapped to co-processor 2.

Adding a list here so we can document what's missing.

Missing in Capstone

cop0
cop1
cop2
cop3
cfc2
cfc3

# the following can all also be achieved using the cop0 instruction, but they also have their own mnemonic short-hands.
rfe
tlbp
tlbr
tlbwi
tlbwr

Others may be missing as well.

kabeor commented 2 years ago

Close this issue for now because of legacy, we are preparing to release Capstone 5.0, plz feel free to open a new issue if that still has this issue. thx :)

tnias commented 1 year ago

I learned about the rfe instruction today and tested with the current 5.0-rc2 candidate. It is not there yet.

$ cstool -v
cstool for Capstone Disassembler, v5.0.0
Capstone build: x86=1 arm=1 arm64=1 mips=1 ppc=1 sparc=1 sysz=1 xcore=1 m68k=1 tms320c64x=1 m680x=1 evm=1 wasm=1 mos65xx=1 bpf=1 riscv=1
$ cstool mipsbe 0x42000018
 0  42 00 00 18  eret
$ cstool mipsbe 0x42000010
ERROR: invalid assembly code

btw. ghidra has support https://github.com/NationalSecurityAgency/ghidra/issues/1764