With the commit at 4c1a8f810e53c0f95885cb33bfa89574ea96a61e a lot of previous schematics I've done have their labels all offset downwards just a bit. It is just a shade and in many things is not noticed, but in a lot of integrated circuits, it shows up. I can see why/how roughly refactoring padding on text (going off commit) could/might do that, but some of the test notebooks seem to have issues now. In particular, when I build the test_intcircuits.ipynb with any commit after/including the one stated above the labels do not look correct. The impact on most IC devices but especially the seven-segment display is readily apparent. I might dig to see if there's something up with how that got modified, but I'm also wondering is there a way to address this in line with the project vision? Unless I'm doing something stupid with my local runs or something.
With the commit at
4c1a8f810e53c0f95885cb33bfa89574ea96a61e
a lot of previous schematics I've done have their labels all offset downwards just a bit. It is just a shade and in many things is not noticed, but in a lot of integrated circuits, it shows up. I can see why/how roughly refactoring padding on text (going off commit) could/might do that, but some of the test notebooks seem to have issues now. In particular, when I build thetest_intcircuits.ipynb
with any commit after/including the one stated above the labels do not look correct. The impact on most IC devices but especially the seven-segment display is readily apparent. I might dig to see if there's something up with how that got modified, but I'm also wondering is there a way to address this in line with the project vision? Unless I'm doing something stupid with my local runs or something.