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cdonovick / peak

Peak : Processor Specification Language ala Newell and Bell's ISP
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[Question] RTL export support #198

Closed Nic30 closed 4 years ago

Nic30 commented 4 years ago

Hello, are you able to generate an actual hardware from ISA description? I am missing some description about what this project actually does.

cdonovick commented 4 years ago

Yes, we can generate RTL. We use the HDL magma to generate verilog. There isn't documentation but we have tests for the code path.

https://github.com/cdonovick/peak/blob/master/tests/test_magma.py

https://github.com/phanrahan/magma.

Nic30 commented 4 years ago

Nice, I still do not know how to actually use this project, but I will keep eye on it. It looks interesting. I do have similar set of tools but I can not compare it now. Are you somehow related to Stanford?

cdonovick commented 4 years ago

Yes, I am Stanford phd candidate.

Nic30 commented 4 years ago

Thank you for the information, I looking forward to see this tool in action some day.

cdonovick commented 4 years ago

I would be happy to give you a tour of the tool at some point if you would be interested.

Nic30 commented 4 years ago

Sure, I am a PhD student which is working with "hw compilers" for network apps, naturally this project interests me.

cdonovick commented 4 years ago

Cool! I am currently working on two submissions to ASPLOS so I am pretty time poor. Once that is done I'd be happy to chat with you to see if there is anyway our tools could be useful. You might also be interested in our HDL magma which I previously mentioned (more or less chisel in python). It actually has documentation so is much more approachable.

Nic30 commented 4 years ago

https://github.com/phanrahan/magma/issues/281