Open estalvgs1999 opened 2 years ago
processor/hdl/generic_blocks_vector/vector_register_file.sv
processor/tests/geo/vector_register_file_test.sv
Código de Referencia: https://github.com/fmurillom/Proyecto_2_Arqui_2_SIMD/blob/master/SystemVerilog/BancoRegistrosV.sv Consulta (p40): https://dl.acm.org/doi/10.1145/2912884
processor/hdl/generic_blocks_vector/vector_register_file.sv
processor/tests/geo/vector_register_file_test.sv
Código de Referencia: https://github.com/fmurillom/Proyecto_2_Arqui_2_SIMD/blob/master/SystemVerilog/BancoRegistrosV.sv Consulta (p40): https://dl.acm.org/doi/10.1145/2912884