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cfelton / rhea

A collection of MyHDL cores and tools for complex digital circuit design
MIT License
84 stars 33 forks source link

added support for De1-SoC Terasic FPGA Board. #22

Closed Godtec closed 8 years ago

Godtec commented 8 years ago

Noticed incomplete De0Nano Soc GPIO pins. Completed the pin-out designations for you.

Also, Started to add support for the DE1-SoC Board that I have. Both at this point are untested.

Godtec commented 8 years ago

More work to do, will fix..