Adding support for std_ulogic/vector

cfoge / VHDL_parse

A collection of Python scripts to make working with VHDL easier

MIT License

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Adding support for std_ulogic/vector #1

Closed svenka3 closed 1 year ago

svenka3 commented 1 year ago

I needed a quick TB generator and I stumbled upon this nice, handy parse_vhdl. With some tweaks, I got std_ulogic working. Would you be interested in a PR? The fix was simply copy-patse and change logic/ulogic at few places.

Thanks

cfoge commented 1 year ago

yes please, this is something that i am just chipping away in the background, any input would be greatly appreciated.