I encountered an issue while building the kernel according to the repository instructions. I noticed that there is a configuration option "CONFIG_RISCV_ISA_V=y" in the qemu_defconfig file, but this option disappeared after executing the "make defconfig" command. I would like to know if the kernel supports the RISC-V vector extension instruction set?
Hi everyone,
I encountered an issue while building the kernel according to the repository instructions. I noticed that there is a configuration option "CONFIG_RISCV_ISA_V=y" in the qemu_defconfig file, but this option disappeared after executing the "make defconfig" command. I would like to know if the kernel supports the RISC-V vector extension instruction set?