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chili-chips-ba / openCologne

Spicing up the first and only EU FPGA chip with a flashy new board, loaded with a suite of engaging demos and examples.
https://www.chili-chips.xyz/open-cologne
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GateMate Constraint File Pin Declaration Format #10

Open TarikHamedovic opened 3 weeks ago

TarikHamedovic commented 3 weeks ago

The current constraint format for GateMate chips requires the declaration of pin directions both in the constraint file and the HDL file such as Pin_in, Pin_out, Pin_inout. This approach is unconventional and differs from other vendors, creating challenges in implementing Amaranth HLS for GateMate chips. The primary issue is the inability to create a general constraint file due to the necessity of specifying pin directions in the constraint file.

Proposed Solution

To resolve this issue, it is suggested to use a general pin constraint format that only requires the pin identifier, without the need to specify its direction in the constraint file. This would align with common practices and facilitate easier implementation and integration with Amaranth HLS.

By adopting this improvement, the workflow for developing with GateMate chips would become more streamlined and user-friendly, aligning better with industry standards.

chili-chips-ba commented 2 weeks ago

@pu-cc , @whitequark for awareness. Also see: https://github.com/amaranth-lang/amaranth/discussions/1372#discussioncomment-9616737

chili-chips-ba commented 2 weeks ago

... given Yosys SV problems, one option to consider is to move all new design creation to Amaranth. While that's a no brainer for other vendors, these CologneChip constraints peculiarities stand in the way of adopting such development flow for GateMate.

whitequark commented 1 week ago

I am not a part of your team nor am I responsible for addressing this issue.